The present invention relates generally to the data processing field, and more particularly, relates to a method for partial paging and eviction of microprocessor instructions in an embedded computer.
In a computer system where paging of microprocessor instructions is necessary, the computer system performance is limited in instances where processor utilization is required for data movement due to paging of microprocessor instructions.
FIG. 2 illustrates conventional sequential steps for moving a virtual page into a physical page or conventional virtual to physical address translation. FIG. 3 illustrates a conventional page table and a page table, a page table entry group and a page table entry relationship 300. A page table 302 is made up of a number of page table entry groups 304; this number is normally dependent on the implementation of the processor""s memory management unit. Each page table entry group 304 is made up of a number of page table entries 306; this is normally a fixed number, such as illustrated by page table entry group 308. Each virtual address maps to a specific page table entry group or groups 304 and can occupy any of the page table entries 306 within that group or groups 304. Each page table entry 306 also has a mapping to a specific physical page.
Referring to FIG. 2, moving a virtual page into a physical page is triggered by an instruction page fault in the processor as indicated in a block 200. Then the processor performs a hashing algorithm on the virtual address to determine or identify to which page table entry group this virtual address belongs as indicated in a block 202. The identified page table entry group is searched for a free or open entry which does not currently map a virtual page to a physical page as indicated in a block 204. If a free page table entry is not found at decision block 206, then a page table entry must be selected in which the data for the virtual page will be evicted from the physical page as indicated in a block 208. If a free page table entry is found at decision block 206 or after a page is selected for eviction at block 208, then the data for the entire new virtual page is moved into the physical page in the page table entry as indicated in a block 210. Then the virtual page is mapped to the physical page within the processor as indicated in a block 212.
A need exists for a mechanism for partial paging and eviction of microprocessor instructions in an embedded computer. As used in the following description and claims, the terms partial and partial page mean a unit of memory that is a fraction of a page.
A principal object of the present invention is to provide a method and computer program product for partial paging and eviction of microprocessor instructions in an embedded computer. Other important objects of the present invention are to provide such method and computer program product for partial paging and eviction of microprocessor instructions in an embedded computer substantially without negative effect and that overcome many of the disadvantages of prior art arrangements.
In brief, a method and computer program product are provided for partial paging and eviction of microprocessor instructions. Responsive to an instruction page fault, a predefined algorithm is applied to a virtual page address for the identified instruction page fault to identify a page table entry group within a volatile memory. Next searching an identified page table entry group for an open page table entry is performed. Responsive to an identified open page table entry, a partial page is copied from a non-volatile memory to a corresponding partial page within the volatile memory. Responsive to failing to identify an open page table entry, a virtual page residing within the volatile memory is selected for eviction.
In accordance with features of the invention, a virtual page residing within the volatile memory is selected for eviction based upon at least one of determining which virtual page of all virtual pages residing in the volatile memory and within the identified page table entry group that has been evicted a fewest number of times; determining which virtual page of all virtual pages residing in the volatile memory and within the identified page table entry group that has fewest partial pages resident and determining which virtual page of all virtual pages residing in the volatile memory and within the identified page table entry group that has been resident longest.